Source: businesskorea
In order to strengthen the cooperation with large wafer OEM customers in the packaging field, the DS Department of Samsung Electronics established a semiconductor packaging working group (TF) in mid June, which is directly led by Kyung Kye Hyun, CEO of DS department.
According to businesskorea, Samsung Electronics‘ semiconductor packaging working group (TF) is composed of engineers from DS department‘s test and system packaging (TSP), researchers from Semiconductor R & D center, and the head of the company‘s memory and wafer manufacturing department.
The report pointed out that as the miniaturization of circuits in front-end technology has reached its limit, "3D Packaging" or "small chip" technology is attracting manufacturers‘ investment. According to yole development, a market research organization, Intel and TSMC accounted for 32% and 27% of the world‘s advanced packaging investment respectively in 2022. Samsung ranks fourth, second only to Sunmoon in Taiwan, China.
It is reported that Samsung Electronics launched the 3D stacking technology "X-cube" in 2020, focusing on high-performance computing processors, 5g networked data chips, AI computing chips and other applications. The DS Department of the company also revealed at the hot chips held last June that it was developing 3.5D advanced packaging technology.
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